1. Field of the Invention
The present invention generally relates to a semiconductor device and semiconductor device unit, and more particularly to a semiconductor device and semiconductor device unit which can provide high-density arrangement.
2. Description of the Related Art
In recent years, the semiconductor device with advanced functions and multiple bit features has been rapidly proliferated, and, in connection with this, the number of the leads tends to be increased.
On the other hand, the miniaturization of the semiconductor device is demanded, and it is necessary to adopt the smaller pitch of the leads. Therefore, it is desirable to provide the semiconductor device which can meet both the demands.
For example, there are the conventional semiconductor devices that are known from Japanese Laid-Open Patent Applications No. 09-293822 and No. 07-030067. These semiconductor devices have the composition in which the semiconductor chip, the stage, the lead, the wire, etc. are encapsulated in the resin package.
The semiconductor device of Japanese Laid-Open Patent Application No. 09-293822 comprises the lead frame for transferring an electrical signal, the auxiliary VSS power-supply semiconductor supporting lead frame on which the semiconductor chip is mounted, and the main VDD power-supply lead frame formed in the frame-like shape at the upper part of the semiconductor supporting lead frame. And the signal electrodes formed on the semiconductor chip are connected to the electrical-signal transmission lead frame by the wires.
Moreover, the power-supply electrodes on the semiconductor chip are connected to the VSS power-supply semiconductor supporting lead frame or the VDD power-supply lead frame by the wires. Furthermore, the semiconductor supporting lead frame is provided with the outwardly extended portions extending along the diagonal line linking two of the four corners of the semiconductor supporting lead frame.
On the other hand, the semiconductor device of Japanese Laid-Open Patent Applications No. 07-030067 has the composition in which the semiconductor chip is mounted on the metal tab. Moreover, the frame-like metal layer is formed on the metal tab so that the metal layer surrounds the semiconductor chip on the metal tab via the insulation layer.
The leads are arranged on the periphery of the metal layer so that the metal layer is surrounded by the leads. The leads are connected to the electrodes of the semiconductor chip, the tab, and the metal layer by the bonding wires. Moreover, the metal tab is provided with the outwardly extended portions which extend from the four corners of the tab.
However, in the conventional semiconductor devices mentioned above, the outwardly extended portions extending along the diagonal line linking two of the four corners of the semiconductor supporting lead frame as in Japanese Laid-Open Patent Applications No. 09-293822, and the outwardly extended portions which extend from the four corners of the metal tab as in Japanese Laid-Open Patent Applications No. 07-030067 are cut away after formation of the package and they do not serve as the external connection terminals.
For this reason, the layout of the leads arranged on the periphery of the semiconductor device package is such that the density of the leads at the four-corner positions of the package is small and the density of the leads at the side portions of the package other than the four corners is large. Therefore, in the conventional semiconductor devices, the entire circumference of the package is not effectively used for the arrangement of the leads, and there is the problem that the size of the semiconductor device is increased.
Moreover, in connection with the high-density arrangement of the semiconductor device as mentioned above, the lead pitch becomes narrow and the width of the lead itself also becomes narrow. Hence, the width of the leads connected to the power supply and the ground also becomes narrow. On the other hand, in order to raise the electrical properties of the semiconductor device, it is desirable that the leads connected to the power supply and the ground have low impedance.
However, it is difficult for the conventional semiconductor devices to attain low impedance of the leads connected to the power supply and the ground, and there is the problem that the electrical properties deteriorate.